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Text File  |  1996-01-02  |  175b  |  11 lines
  1. Eight SIMM slots
  2.  
  3. 4MB minimum to operate
  4.  
  5. Stage TWO = 68040 CPU/40MHz
  6.  
  7. Rocket 25 and 55i = 68040/25MHz
  8.  
  9. Rocket 33 = 68040/33MHz
  10.  
  11. Requires true 8-bit, 30-pin 8MB and 16MB SIMMs